| 19 | The intel suite provides parallel instantiations and compilers that support three distinct programming models: |
| 20 | |
| 21 | * Automatic Offloading (AO) - the intel MKL library sends certain calculations to the Phi without any user input. |
| 22 | * Native Programming - Code is compiled to run on the Xeon Phi Coprocessor and ONLY on the Xeon Phi Coprocessor. |
| 23 | * Offloading - Certain Parallel sections of your source code are identified for offloading to the coprocessor. This provides the greatest amount of control and allows for the CPUs and coprocessors to work in tandem. |
| 24 | |
| 25 | === Automatic Offloading === |
| 26 | |
| 27 | === Native Programming === |
| 28 | |
| 29 | === Offloading === |
| 30 | |
| 31 | |
| 32 | == Programming Considerations == |
| 33 | |
| 34 | The number one thing to keep in mind is that all data traffic to and from the coprocessors must travel over PCIE. This is a relatively slow connection when compared to memory and the more you can minimize this communication, the faster you code will run. |
| 35 | |
| 36 | |
| 37 | == Future Training == |
| 38 | We've only scratched the surface on the potential of the Xeon Phi coprocessor. If you are interested in learning more, Colfax International will be giving two days of instruction on coding for the Xeon Phi at Tulane this October. Interested parties can register at |
| 39 | |
| 40 | CDT 101: http://events.r20.constantcontact.com/register/event?oeidk=a07eayq4gvha16a1237&llr=kpiwi7pab |
| 41 | |
| 42 | CDT 102: http://events.r20.constantcontact.com/register/event?oeidk=a07eayqb5mwf5397895&llr=kpiwi7pab |
| 43 | |