Basics of Makefile
Subprogram/Module/Class
- functions can be defined in separated files.
- subprogram/module (Fortran, C…)
- class (C++, python, Objective-C,Java…)
- subprogram/module/class is defined for some specific purpose. one can use it without looking in the detail, just know what inputs and outputs / functions…
- C module
- .c files: source code / functions
- .h files: header files, define functions and etc…
Makefile
- A common way of automating software builds and other complex tasks with dependencies.
- A Makefile is itself a program in a special language.
- The command 'make' reads 'Makefile' and do some tasks.
- Can specify file name 'make -f mymakefile'.
- The default name is "Makefile"
Structure of Makefile
Typical element in the simple Makefile:
target: dependencies [TAB] command to make target
It is important to use tab character, not spaces.
command 'make target' means:
- Make sure all the dependencies are up to date
- If target is older than any dependency, recreate it using the specified commands.
For example:
# # Large Scale Computing # Heat / Mass Transfer # ALL: ex20 ex21 # CC = gcc CFLAGS = -g # SRC_EX20 = ex20.c cg.c SRC_EX21 = ex21.c cg.c # OBJ_EX20 = $(SRC_EX20:.c=.o) OBJ_EX21 = $(SRC_EX21:.c=.o) # ex20 : $(OBJ_EX20) $(CC) $(CFLAGS) -o $@ $(OBJ_EX20) ex21 : $(OBJ_EX21) $(CC) $(CFLAGS) -o $@ $(OBJ_EX21) # %.o : %.c $(CC) $(CFLAGS) -c $< cg.o : cg.c cg.h $(CC) $(CFLAGS) -c cg.c clean: rm -f *.o ex20
lines begin with # is comments
Age of dependency
The last modification time of the file is used.
$ ls -l -rw-r--r-- 1 fuji staff 388 Sep 21 22:37 Makefile -rw-r--r-- 1 fuji staff 2030 Sep 21 19:31 cg.c -rw-r--r-- 1 fuji staff 838 Sep 21 19:31 cg.h -rw-r--r-- 1 fuji staff 4768 Sep 21 22:37 cg.o -rwxr-xr-x 1 fuji staff 13308 Sep 22 09:44 ex20 -rw-r--r-- 1 fuji staff 3035 Sep 21 22:39 ex20.c -rw-r--r-- 1 fuji staff 7728 Sep 22 09:44 ex20.o
- cg.c and cg.h to generate cg.o
- ex20.c to generate ex20.o
- ex20.o and cg.o to generate ex20
Since all target files are newer than dependencies,
$ make make: Nothing to be done for `ALL'.
make command does not do anything.
$ touch cg.h $ ls -l -rw-r--r-- 1 fuji staff 388 Sep 21 22:37 Makefile -rw-r--r-- 1 fuji staff 2030 Sep 21 19:31 cg.c -rw-r--r-- 1 fuji staff 838 Sep 22 09:51 cg.h -rw-r--r-- 1 fuji staff 4768 Sep 21 22:37 cg.o -rwxr-xr-x 1 fuji staff 13308 Sep 22 09:44 ex20 -rw-r--r-- 1 fuji staff 3035 Sep 21 22:39 ex20.c -rw-r--r-- 1 fuji staff 7728 Sep 22 09:44 ex20.o
Now cg.h is newer than cg.o,
$ make gcc -g -c cg.c gcc -g -o ex20 ex20.o cg.o
make command generates cg.o then generates ex20.
implicit rules
General rule to make the *.o files from *.c files:
%.o : %.c %.h gcc -c $<
To make target
ex20 : $(OBJ_EX20) gcc -o $@ $(OBJ_EX20)
variables / macros
CC = gcc CFLAGS = -g # SRC_EX20 = ex20.c cg.c SRC_EX21 = ex21.c cg.c # OBJ_EX20 = $(SRC_EX20:.c=.o) OBJ_EX21 = $(SRC_EX21:.c=.o)
Last modified
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Last modified on 10/12/15 16:03:55
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